Design services
Transistor-level design for critical datapath blocks.
Where a few cell types repeat very many times and carry a chip's energy or area, the circuit and its layout are designed at transistor level: custom cells, library characterization, hand-crafted netlists, custom clock trees and manual place and route. The rest of the chip stays on a standard tool flow.
Where it applies
Blocks worth the extra work.
Datapaths
Arithmetic and sequential cells in regular arrays, with the wiring planned with the cells.
Repeated cells
A small number of cell types, designed once and used very many times.
Checked like a library
Each custom block is checked against its RTL and characterized like a library cell.
Related pages
A block that will not close?
Send its specification and current results, and we will reply.